Description
Migration to nanometer design — the continuous
shrinkage of the size of process features and other features,
such as wires, transistors and contacts on ICs, due to the
ongoing advances in the semiconductor manufacturing
processes — represents a major challenge for
participants in the semiconductor industry, from IC design and
design automation to design of manufacturing equipment and the
manufacturing process itself. Shrinking transistor sizes are
challenging the industry in the application of more complex
physics and chemistry in order to produce advanced silicon
devices. For EDA tools, models of each component’s
electrical properties and behavior become more complex as do
requisite analysis, design and verification capabilities. Novel
design tools and methodologies must be invented quickly to
remain competitive in the design of electronics in the smallest
nanometer ranges.
Discussion
ID
Source-000025573
Title
CADENCE DESIGN SYSTEMS, INC.'s Annual Form 10-K report 2010
Year
2008
2009
2010
Report Type
Form 10-K
Annual Report
Companies